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Name: uhd-firmware | Distribution: openSUSE Tumbleweed |
Version: 4.7.0.0 | Vendor: openSUSE |
Release: 1.4 | Build date: Sat Jun 29 23:43:53 2024 |
Group: Hardware/Other | Build host: reproducible |
Size: 717502651 | Source RPM: uhd-4.7.0.0-1.4.src.rpm |
Packager: https://bugs.opensuse.org | |
Url: https://files.ettus.com/manual/ | |
Summary: Firmware images for uhd |
This package contains binary firmware images for the Universal Hardware Driver (UHD).
GPL-3.0-or-later
* Sat Jun 29 2024 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.7.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes - Patches fix-boost1.85-one.patch and fix-boost1.85-two.patch removed (applied upstream) * Fri Apr 26 2024 Ana Guerrero <ana.guerrero@suse.com> - Fix build with boost 1.85, add patches fix-boost1.85-one.patch and fix-boost1.85-two.patch * Tue Nov 14 2023 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.6.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes * Wed Sep 13 2023 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.5.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes * Wed Feb 01 2023 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.4.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes * Wed Sep 14 2022 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.3.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes * Fri Jul 29 2022 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.2.0.1 See: https://github.com/EttusResearch/uhd/releases for all changes * Fri Apr 22 2022 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.2.0.0 See: https://github.com/EttusResearch/uhd/releases for all changes * Wed Dec 22 2021 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.1.0.5 See: https://github.com/EttusResearch/uhd/releases for all changes * Wed Dec 15 2021 Wojciech Kazubski <wk@ire.pw.edu.pl> - Update to version 4.1.0.4 * This release corrects an oversight in the 4.1.0.3 release by updating the version string reported by UHD. * uhd + Update version in UHDVersion.cmake
/usr/share/uhd/images /usr/share/uhd/images/LICENSE /usr/share/uhd/images/bit /usr/share/uhd/images/bit/usrp_n200_r3_fpga.bit /usr/share/uhd/images/bit/usrp_n200_r4_fpga.bit /usr/share/uhd/images/bit/usrp_n210_r3_fpga.bit /usr/share/uhd/images/bit/usrp_n210_r4_fpga.bit /usr/share/uhd/images/inventory.json /usr/share/uhd/images/octoclock_bootloader.hex /usr/share/uhd/images/octoclock_r4_fw.hex /usr/share/uhd/images/uhd-images_4.7.0.0 /usr/share/uhd/images/usrp1_fpga.rbf /usr/share/uhd/images/usrp1_fpga_4rx.rbf /usr/share/uhd/images/usrp1_fw.ihx /usr/share/uhd/images/usrp2_fpga.bin /usr/share/uhd/images/usrp2_fw.bin /usr/share/uhd/images/usrp_b100_fpga.bin /usr/share/uhd/images/usrp_b100_fpga_2rx.bin /usr/share/uhd/images/usrp_b100_fw.ihx /usr/share/uhd/images/usrp_b200_bl.img /usr/share/uhd/images/usrp_b200_fpga.bin /usr/share/uhd/images/usrp_b200_fpga.rpt /usr/share/uhd/images/usrp_b200_fw.hex /usr/share/uhd/images/usrp_b200mini_fpga.bin /usr/share/uhd/images/usrp_b200mini_fpga.rpt /usr/share/uhd/images/usrp_b205mini_fpga.bin /usr/share/uhd/images/usrp_b205mini_fpga.rpt /usr/share/uhd/images/usrp_b210_fpga.bin /usr/share/uhd/images/usrp_b210_fpga.rpt /usr/share/uhd/images/usrp_e310_sg1_fpga.bit /usr/share/uhd/images/usrp_e310_sg1_fpga.bit.md5 /usr/share/uhd/images/usrp_e310_sg1_fpga.dts /usr/share/uhd/images/usrp_e310_sg1_fpga.dts.md5 /usr/share/uhd/images/usrp_e310_sg1_fpga.rpt /usr/share/uhd/images/usrp_e310_sg1_idle_fpga.bit /usr/share/uhd/images/usrp_e310_sg1_idle_fpga.bit.md5 /usr/share/uhd/images/usrp_e310_sg1_idle_fpga.dts /usr/share/uhd/images/usrp_e310_sg1_idle_fpga.dts.md5 /usr/share/uhd/images/usrp_e310_sg1_idle_fpga.rpt /usr/share/uhd/images/usrp_e310_sg3_fpga.bit /usr/share/uhd/images/usrp_e310_sg3_fpga.bit.md5 /usr/share/uhd/images/usrp_e310_sg3_fpga.dts /usr/share/uhd/images/usrp_e310_sg3_fpga.dts.md5 /usr/share/uhd/images/usrp_e310_sg3_fpga.rpt /usr/share/uhd/images/usrp_e310_sg3_idle_fpga.bit /usr/share/uhd/images/usrp_e310_sg3_idle_fpga.bit.md5 /usr/share/uhd/images/usrp_e310_sg3_idle_fpga.dts /usr/share/uhd/images/usrp_e310_sg3_idle_fpga.dts.md5 /usr/share/uhd/images/usrp_e310_sg3_idle_fpga.rpt /usr/share/uhd/images/usrp_e320_fpga_1G.bit /usr/share/uhd/images/usrp_e320_fpga_1G.bit.md5 /usr/share/uhd/images/usrp_e320_fpga_1G.dts /usr/share/uhd/images/usrp_e320_fpga_1G.dts.md5 /usr/share/uhd/images/usrp_e320_fpga_1G.rpt /usr/share/uhd/images/usrp_e320_fpga_AA.bit /usr/share/uhd/images/usrp_e320_fpga_AA.bit.md5 /usr/share/uhd/images/usrp_e320_fpga_AA.dts /usr/share/uhd/images/usrp_e320_fpga_AA.dts.md5 /usr/share/uhd/images/usrp_e320_fpga_AA.rpt /usr/share/uhd/images/usrp_e320_fpga_XG.bit /usr/share/uhd/images/usrp_e320_fpga_XG.bit.md5 /usr/share/uhd/images/usrp_e320_fpga_XG.dts /usr/share/uhd/images/usrp_e320_fpga_XG.dts.md5 /usr/share/uhd/images/usrp_e320_fpga_XG.rpt /usr/share/uhd/images/usrp_n200_fw.bin /usr/share/uhd/images/usrp_n200_r2_fpga.bin /usr/share/uhd/images/usrp_n200_r3_fpga.bin /usr/share/uhd/images/usrp_n200_r4_fpga.bin /usr/share/uhd/images/usrp_n210_fw.bin /usr/share/uhd/images/usrp_n210_r2_fpga.bin /usr/share/uhd/images/usrp_n210_r3_fpga.bin /usr/share/uhd/images/usrp_n210_r4_fpga.bin /usr/share/uhd/images/usrp_n300_fpga_AA.bit /usr/share/uhd/images/usrp_n300_fpga_AA.bit.md5 /usr/share/uhd/images/usrp_n300_fpga_AA.dts /usr/share/uhd/images/usrp_n300_fpga_AA.dts.md5 /usr/share/uhd/images/usrp_n300_fpga_AA.rpt /usr/share/uhd/images/usrp_n300_fpga_HG.bit /usr/share/uhd/images/usrp_n300_fpga_HG.bit.md5 /usr/share/uhd/images/usrp_n300_fpga_HG.dts /usr/share/uhd/images/usrp_n300_fpga_HG.dts.md5 /usr/share/uhd/images/usrp_n300_fpga_HG.rpt /usr/share/uhd/images/usrp_n300_fpga_WX.bit /usr/share/uhd/images/usrp_n300_fpga_WX.bit.md5 /usr/share/uhd/images/usrp_n300_fpga_WX.dts /usr/share/uhd/images/usrp_n300_fpga_WX.dts.md5 /usr/share/uhd/images/usrp_n300_fpga_WX.rpt /usr/share/uhd/images/usrp_n300_fpga_XG.bit /usr/share/uhd/images/usrp_n300_fpga_XG.bit.md5 /usr/share/uhd/images/usrp_n300_fpga_XG.dts /usr/share/uhd/images/usrp_n300_fpga_XG.dts.md5 /usr/share/uhd/images/usrp_n300_fpga_XG.rpt /usr/share/uhd/images/usrp_n310_fpga_AA.bit /usr/share/uhd/images/usrp_n310_fpga_AA.bit.md5 /usr/share/uhd/images/usrp_n310_fpga_AA.dts /usr/share/uhd/images/usrp_n310_fpga_AA.dts.md5 /usr/share/uhd/images/usrp_n310_fpga_AA.rpt /usr/share/uhd/images/usrp_n310_fpga_HG.bit /usr/share/uhd/images/usrp_n310_fpga_HG.bit.md5 /usr/share/uhd/images/usrp_n310_fpga_HG.dts /usr/share/uhd/images/usrp_n310_fpga_HG.dts.md5 /usr/share/uhd/images/usrp_n310_fpga_HG.rpt /usr/share/uhd/images/usrp_n310_fpga_WX.bit /usr/share/uhd/images/usrp_n310_fpga_WX.bit.md5 /usr/share/uhd/images/usrp_n310_fpga_WX.dts /usr/share/uhd/images/usrp_n310_fpga_WX.dts.md5 /usr/share/uhd/images/usrp_n310_fpga_WX.rpt /usr/share/uhd/images/usrp_n310_fpga_XG.bit /usr/share/uhd/images/usrp_n310_fpga_XG.bit.md5 /usr/share/uhd/images/usrp_n310_fpga_XG.dts /usr/share/uhd/images/usrp_n310_fpga_XG.dts.md5 /usr/share/uhd/images/usrp_n310_fpga_XG.rpt /usr/share/uhd/images/usrp_n320_fpga_AA.bit /usr/share/uhd/images/usrp_n320_fpga_AA.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_AA.dts /usr/share/uhd/images/usrp_n320_fpga_AA.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_AA.rpt /usr/share/uhd/images/usrp_n320_fpga_AQ.bit /usr/share/uhd/images/usrp_n320_fpga_AQ.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_AQ.dts /usr/share/uhd/images/usrp_n320_fpga_AQ.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_AQ.rpt /usr/share/uhd/images/usrp_n320_fpga_HG.bit /usr/share/uhd/images/usrp_n320_fpga_HG.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_HG.dts /usr/share/uhd/images/usrp_n320_fpga_HG.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_HG.rpt /usr/share/uhd/images/usrp_n320_fpga_WX.bit /usr/share/uhd/images/usrp_n320_fpga_WX.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_WX.dts /usr/share/uhd/images/usrp_n320_fpga_WX.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_WX.rpt /usr/share/uhd/images/usrp_n320_fpga_XG.bit /usr/share/uhd/images/usrp_n320_fpga_XG.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_XG.dts /usr/share/uhd/images/usrp_n320_fpga_XG.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_XG.rpt /usr/share/uhd/images/usrp_n320_fpga_XQ.bit /usr/share/uhd/images/usrp_n320_fpga_XQ.bit.md5 /usr/share/uhd/images/usrp_n320_fpga_XQ.dts /usr/share/uhd/images/usrp_n320_fpga_XQ.dts.md5 /usr/share/uhd/images/usrp_n320_fpga_XQ.rpt /usr/share/uhd/images/usrp_x300_fpga_HG.bit /usr/share/uhd/images/usrp_x300_fpga_HG.lvbitx /usr/share/uhd/images/usrp_x300_fpga_HG.rpt /usr/share/uhd/images/usrp_x300_fpga_XG.bit /usr/share/uhd/images/usrp_x300_fpga_XG.lvbitx /usr/share/uhd/images/usrp_x300_fpga_XG.rpt /usr/share/uhd/images/usrp_x310_fpga_HG.bit /usr/share/uhd/images/usrp_x310_fpga_HG.lvbitx /usr/share/uhd/images/usrp_x310_fpga_HG.rpt /usr/share/uhd/images/usrp_x310_fpga_XG.bit /usr/share/uhd/images/usrp_x310_fpga_XG.lvbitx /usr/share/uhd/images/usrp_x310_fpga_XG.rpt /usr/share/uhd/images/usrp_x410_fpga_CG_400.bit /usr/share/uhd/images/usrp_x410_fpga_CG_400.bit.md5 /usr/share/uhd/images/usrp_x410_fpga_CG_400.dts /usr/share/uhd/images/usrp_x410_fpga_CG_400.dts.md5 /usr/share/uhd/images/usrp_x410_fpga_CG_400.rpt /usr/share/uhd/images/usrp_x410_fpga_UC_200.bit /usr/share/uhd/images/usrp_x410_fpga_UC_200.bit.md5 /usr/share/uhd/images/usrp_x410_fpga_UC_200.dts /usr/share/uhd/images/usrp_x410_fpga_UC_200.dts.md5 /usr/share/uhd/images/usrp_x410_fpga_UC_200.rpt /usr/share/uhd/images/usrp_x410_fpga_X4_200.bit /usr/share/uhd/images/usrp_x410_fpga_X4_200.bit.md5 /usr/share/uhd/images/usrp_x410_fpga_X4_200.dts /usr/share/uhd/images/usrp_x410_fpga_X4_200.dts.md5 /usr/share/uhd/images/usrp_x410_fpga_X4_200.rpt /usr/share/uhd/images/usrp_x440_fpga_CG_1600.bit /usr/share/uhd/images/usrp_x440_fpga_CG_1600.bit.md5 /usr/share/uhd/images/usrp_x440_fpga_CG_1600.dts /usr/share/uhd/images/usrp_x440_fpga_CG_1600.dts.md5 /usr/share/uhd/images/usrp_x440_fpga_CG_1600.rpt /usr/share/uhd/images/usrp_x440_fpga_CG_400.bit /usr/share/uhd/images/usrp_x440_fpga_CG_400.bit.md5 /usr/share/uhd/images/usrp_x440_fpga_CG_400.dts /usr/share/uhd/images/usrp_x440_fpga_CG_400.dts.md5 /usr/share/uhd/images/usrp_x440_fpga_CG_400.rpt /usr/share/uhd/images/usrp_x440_fpga_X4_1600.bit /usr/share/uhd/images/usrp_x440_fpga_X4_1600.bit.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_1600.dts /usr/share/uhd/images/usrp_x440_fpga_X4_1600.dts.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_1600.rpt /usr/share/uhd/images/usrp_x440_fpga_X4_200.bit /usr/share/uhd/images/usrp_x440_fpga_X4_200.bit.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_200.dts /usr/share/uhd/images/usrp_x440_fpga_X4_200.dts.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_200.rpt /usr/share/uhd/images/usrp_x440_fpga_X4_400.bit /usr/share/uhd/images/usrp_x440_fpga_X4_400.bit.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_400.dts /usr/share/uhd/images/usrp_x440_fpga_X4_400.dts.md5 /usr/share/uhd/images/usrp_x440_fpga_X4_400.rpt
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Fabrice Bellet, Sun Jan 12 00:30:25 2025