From: <pluto@pld-linux.org>
Attached patch fix/add several cpu features.
refs:
[1] Intel Processor Identification and the CPUID instruction
Application Note 485.
http://developer.intel.ru/download/design/Xeon/applnots/24161826.pdf
[2] http://www.sandpile.org/ia32/cpuid.htm
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
25-akpm/arch/i386/kernel/cpu/proc.c | 4 ++--
25-akpm/arch/x86_64/kernel/setup.c | 4 ++--
25-akpm/include/asm-i386/cpufeature.h | 11 ++++++++---
25-akpm/include/asm-x86_64/cpufeature.h | 10 +++++++++-
4 files changed, 21 insertions(+), 8 deletions(-)
diff -puN arch/i386/kernel/cpu/proc.c~ix86x86_64-cpu-features arch/i386/kernel/cpu/proc.c
--- 25/arch/i386/kernel/cpu/proc.c~ix86x86_64-cpu-features Tue Aug 17 14:35:49 2004
+++ 25-akpm/arch/i386/kernel/cpu/proc.c Tue Aug 17 14:35:49 2004
@@ -44,8 +44,8 @@ static int show_cpuinfo(struct seq_file
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
+ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
diff -puN arch/x86_64/kernel/setup.c~ix86x86_64-cpu-features arch/x86_64/kernel/setup.c
--- 25/arch/x86_64/kernel/setup.c~ix86x86_64-cpu-features Tue Aug 17 14:35:49 2004
+++ 25-akpm/arch/x86_64/kernel/setup.c Tue Aug 17 14:35:49 2004
@@ -1062,8 +1062,8 @@ static int show_cpuinfo(struct seq_file
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
+ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
diff -puN include/asm-i386/cpufeature.h~ix86x86_64-cpu-features include/asm-i386/cpufeature.h
--- 25/include/asm-i386/cpufeature.h~ix86x86_64-cpu-features Tue Aug 17 14:35:49 2004
+++ 25-akpm/include/asm-i386/cpufeature.h Tue Aug 17 14:35:49 2004
@@ -71,9 +71,13 @@
#define X86_FEATURE_P4 (3*32+ 7) /* P4 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
-
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
@@ -92,13 +96,14 @@
#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
#define cpu_has_pae boot_cpu_has(X86_FEATURE_PAE)
#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
-#define cpu_has_sse2 boot_cpu_has(X86_FEATURE_XMM2)
#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
#define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP)
#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
#define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX)
#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
+#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
+#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
#define cpu_has_mp boot_cpu_has(X86_FEATURE_MP)
#define cpu_has_nx boot_cpu_has(X86_FEATURE_NX)
diff -puN include/asm-x86_64/cpufeature.h~ix86x86_64-cpu-features include/asm-x86_64/cpufeature.h
--- 25/include/asm-x86_64/cpufeature.h~ix86x86_64-cpu-features Tue Aug 17 14:35:49 2004
+++ 25-akpm/include/asm-x86_64/cpufeature.h Tue Aug 17 14:35:50 2004
@@ -63,8 +63,14 @@
#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
@@ -81,6 +87,8 @@
#define cpu_has_mmx 1
#define cpu_has_fxsr 1
#define cpu_has_xmm 1
+#define cpu_has_xmm2 1
+#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
#define cpu_has_mp 1 /* XXX */
#define cpu_has_k6_mtrr 0
_