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Fedora 40 for x86_64
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01-value.example.frame.1.png
01-value.example.frame.2.png
01-value.example.frame.3.png
01-value.example.png
02-reg.example.frame.1.png
02-reg.example.frame.2.png
02-reg.example.png
03-memory.example.frame.1.png
03-memory.example.frame.2.png
03-memory.example.frame.3.png
03-memory.example.frame.4.png
03-memory.example.png
04-composite.example.frame.1.png
04-composite.example.frame.2.png
04-composite.example.frame.3.png
04-composite.example.frame.4.png
04-composite.example.frame.5.png
04-composite.example.frame.6.png
04-composite.example.frame.7.png
04-composite.example.png
05-composite-plus.example.frame.1.png
05-composite-plus.example.frame.2.png
06-extension-spill-sgpr-to-static-vpgr-lane.example.frame.1.png
06-extension-spill-sgpr-to-static-vpgr-lane.example.frame.2.png
06-extension-spill-sgpr-to-static-vpgr-lane.example.frame.3.png
06-extension-spill-sgpr-to-static-vpgr-lane.example.png
07-extension-multi-lane-vgpr.example.frame.1.png
07-extension-multi-lane-vgpr.example.frame.10.png
07-extension-multi-lane-vgpr.example.frame.11.png
07-extension-multi-lane-vgpr.example.frame.12.png
07-extension-multi-lane-vgpr.example.frame.13.png
07-extension-multi-lane-vgpr.example.frame.14.png
07-extension-multi-lane-vgpr.example.frame.2.png
07-extension-multi-lane-vgpr.example.frame.3.png
07-extension-multi-lane-vgpr.example.frame.4.png
07-extension-multi-lane-vgpr.example.frame.5.png
07-extension-multi-lane-vgpr.example.frame.6.png
07-extension-multi-lane-vgpr.example.frame.7.png
07-extension-multi-lane-vgpr.example.frame.8.png
07-extension-multi-lane-vgpr.example.frame.9.png
07-extension-multi-lane-vgpr.example.png
08-extension-mixed-composite.example.frame.1.png
08-extension-mixed-composite.example.frame.2.png
08-extension-mixed-composite.example.frame.3.png
08-extension-mixed-composite.example.frame.4.png
08-extension-mixed-composite.example.frame.5.png
08-extension-mixed-composite.example.frame.6.png
08-extension-mixed-composite.example.frame.7.png
08-extension-mixed-composite.example.png
09-extension-form-aspace.example.frame.1.png
09-extension-form-aspace.example.frame.2.png
09-extension-form-aspace.example.frame.3.png
09-extension-form-aspace.example.frame.4.png
09-extension-form-aspace.example.frame.5.png
09-extension-form-aspace.example.png
10-extension-bit-offset.example.frame.1.png
10-extension-bit-offset.example.frame.2.png
10-extension-bit-offset.example.frame.3.png
10-extension-bit-offset.example.frame.4.png
10-extension-bit-offset.example.png
ARM-BE-bitcastfail.png
ARM-BE-bitcastsuccess.png
ARM-BE-ld1.png
ARM-BE-ldr.png
LangImpl05-cfg.png
MCJIT-creation.png
MCJIT-dyld-load.png
MCJIT-engine-builder.png
MCJIT-load-object.png
MCJIT-load.png
MCJIT-resolve-relocations.png
Phabricator_premerge_results.png
Phabricator_premerge_unit_tests.png
block-extract.png
buildbot_worker_contact.png
convergence-both-diverged-nested.png
convergence-closed-path.png
convergence-divergent-inside.png
convergence-divergent-outside.png
convergence-natural-loop.png
cycle-1.png
cycle-2.png
cycle-3.png
cycle.png
cycle_pi.png
epilogue-vectorization-cfg.png
example-gpu-hardware.png
gcc-loops.png
linpack-pc.png
llvm-exegesis-analysis.png
locstats-compare.png
locstats-draw-plot.png
loop-guard.svg
loop-irreducible.svg
loop-merge.svg
loop-nested.svg
loop-nonmaximal.svg
loop-separate.svg
loop-single.svg
loop-terminology-guarded-loop.png
loop-terminology-initial-loop.png
loop-terminology-rotated-loop.png
loop-terminology.svg
pipeline-overview-customized.png
pipeline-overview-with-combiners.png
pipeline-overview.png
simt-execution-model.png
speculative_load_hardening_microbenchmarks.png
testing-pass-level.png
testing-unit-level.png
uml_builder_pattern.png
uml_nodes_and_edges.png
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Fabrice Bellet
, Tue Jul 9 23:23:40 2024