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Mageia Cauldron for aarch64
:
/
usr
/src
/debug
/llvm-20.1.7-1.mga10.aarch64
/llvm
/lib
/Target
/AMDGPU
AMDGPU.h
AMDGPUAliasAnalysis.cpp
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsanInstrumentation.cpp
AMDGPUAsanInstrumentation.h
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUAtomicOptimizer.cpp
AMDGPUAttributes.def
AMDGPUAttributor.cpp
AMDGPUCallLowering.cpp
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp
AMDGPUCombinerHelper.cpp
AMDGPUCombinerHelper.h
AMDGPUCtorDtorLowering.cpp
AMDGPUCtorDtorLowering.h
AMDGPUExportClustering.cpp
AMDGPUExportClustering.h
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def
AMDGPUGlobalISelDivergenceLowering.cpp
AMDGPUGlobalISelUtils.cpp
AMDGPUGlobalISelUtils.h
AMDGPUHSAMetadataStreamer.cpp
AMDGPUHSAMetadataStreamer.h
AMDGPUIGroupLP.cpp
AMDGPUIGroupLP.h
AMDGPUISelDAGToDAG.cpp
AMDGPUISelDAGToDAG.h
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPUImageIntrinsicOptimizer.cpp
AMDGPUInsertDelayAlu.cpp
AMDGPUInstCombineIntrinsic.cpp
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstructionSelector.cpp
AMDGPUInstructionSelector.h
AMDGPULateCodeGenPrepare.cpp
AMDGPULegalizerInfo.cpp
AMDGPULegalizerInfo.h
AMDGPULibCalls.cpp
AMDGPULibFunc.cpp
AMDGPULibFunc.h
AMDGPULowerBufferFatPointers.cpp
AMDGPULowerKernelArguments.cpp
AMDGPULowerKernelAttributes.cpp
AMDGPULowerModuleLDSPass.cpp
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUMCResourceInfo.cpp
AMDGPUMCResourceInfo.h
AMDGPUMIRFormatter.cpp
AMDGPUMIRFormatter.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMarkLastScratchLoad.cpp
AMDGPUMemoryUtils.cpp
AMDGPUMemoryUtils.h
AMDGPUOpenCLEnqueuedBlockLowering.cpp
AMDGPUOpenCLEnqueuedBlockLowering.h
AMDGPUPTNote.h
AMDGPUPassRegistry.def
AMDGPUPerfHintAnalysis.cpp
AMDGPUPerfHintAnalysis.h
AMDGPUPostLegalizerCombiner.cpp
AMDGPUPreLegalizerCombiner.cpp
AMDGPUPreloadKernArgProlog.cpp
AMDGPUPreloadKernArgProlog.h
AMDGPUPrintfRuntimeBinding.cpp
AMDGPUPromoteAlloca.cpp
AMDGPUPromoteKernelArguments.cpp
AMDGPURegBankCombiner.cpp
AMDGPURegBankLegalize.cpp
AMDGPURegBankLegalizeHelper.cpp
AMDGPURegBankLegalizeHelper.h
AMDGPURegBankLegalizeRules.cpp
AMDGPURegBankLegalizeRules.h
AMDGPURegBankSelect.cpp
AMDGPURegisterBankInfo.cpp
AMDGPURegisterBankInfo.h
AMDGPURemoveIncompatibleFunctions.cpp
AMDGPURemoveIncompatibleFunctions.h
AMDGPUReserveWWMRegs.cpp
AMDGPUResourceUsageAnalysis.cpp
AMDGPUResourceUsageAnalysis.h
AMDGPURewriteOutArguments.cpp
AMDGPURewriteUndefForPHI.cpp
AMDGPUSelectionDAGInfo.cpp
AMDGPUSelectionDAGInfo.h
AMDGPUSetWavePriority.cpp
AMDGPUSplitModule.cpp
AMDGPUSplitModule.h
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUSwLowerLDS.cpp
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPUUnifyDivergentExitNodes.h
AMDGPUUnifyMetadata.cpp
AMDKernelCodeT.h
AsmParser
Disassembler
GCNCreateVOPD.cpp
GCNDPPCombine.cpp
GCNDPPCombine.h
GCNHazardRecognizer.cpp
GCNHazardRecognizer.h
GCNILPSched.cpp
GCNIterativeScheduler.cpp
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp
GCNNSAReassign.cpp
GCNPreRALongBranchReg.cpp
GCNPreRAOptimizations.cpp
GCNRegPressure.cpp
GCNRegPressure.h
GCNRewritePartialRegUses.cpp
GCNSchedStrategy.cpp
GCNSchedStrategy.h
GCNSubtarget.cpp
GCNSubtarget.h
GCNVOPDUtils.cpp
GCNVOPDUtils.h
MCA
MCTargetDesc
R600.h
R600AsmPrinter.cpp
R600AsmPrinter.h
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600FrameLowering.cpp
R600FrameLowering.h
R600ISelDAGToDAG.cpp
R600ISelLowering.cpp
R600ISelLowering.h
R600InstrInfo.cpp
R600InstrInfo.h
R600MCInstLower.cpp
R600MachineCFGStructurizer.cpp
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600Subtarget.cpp
R600Subtarget.h
R600TargetMachine.cpp
R600TargetMachine.h
R600TargetTransformInfo.cpp
R600TargetTransformInfo.h
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIFixSGPRCopies.h
SIFixVGPRCopies.cpp
SIFixVGPRCopies.h
SIFoldOperands.cpp
SIFoldOperands.h
SIFormMemoryClauses.cpp
SIFrameLowering.cpp
SIFrameLowering.h
SIISelLowering.cpp
SIISelLowering.h
SIInsertHardClauses.cpp
SIInsertWaitcnts.cpp
SIInstrInfo.cpp
SIInstrInfo.h
SILateBranchLowering.cpp
SILoadStoreOptimizer.cpp
SILoadStoreOptimizer.h
SILowerControlFlow.cpp
SILowerControlFlow.h
SILowerI1Copies.cpp
SILowerI1Copies.h
SILowerSGPRSpills.cpp
SILowerSGPRSpills.h
SILowerWWMCopies.cpp
SILowerWWMCopies.h
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIMachineScheduler.cpp
SIMachineScheduler.h
SIMemoryLegalizer.cpp
SIModeRegister.cpp
SIModeRegisterDefaults.cpp
SIModeRegisterDefaults.h
SIOptimizeExecMasking.cpp
SIOptimizeExecMasking.h
SIOptimizeExecMaskingPreRA.cpp
SIOptimizeVGPRLiveRange.cpp
SIOptimizeVGPRLiveRange.h
SIPeepholeSDWA.cpp
SIPeepholeSDWA.h
SIPostRABundler.cpp
SIPreAllocateWWMRegs.cpp
SIPreAllocateWWMRegs.h
SIPreEmitPeephole.cpp
SIProgramInfo.cpp
SIProgramInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIShrinkInstructions.cpp
SIShrinkInstructions.h
SIWholeQuadMode.cpp
TargetInfo
Utils
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Fabrice Bellet
, Fri Jul 4 04:01:05 2025